The main activities of this service deal with:

• HDL/Verilog to ASIC/FPGA: Modelling, simulation and synthesis of circuits, IPs and growing to systems on chip
• Support and training to users, purchases and general management of CAD
• CAD development for internal useLibraries and design kits development for internal and external technologies
• Management of external kitsBack-end: P&R, delay extraction/backannotation and post layout functional and fault simulation

Cadence

• IC package
• System package

Anacad

Avant! Hspice

Synopsys

• Synthesis and simulation tools
• COSSAP DSP
• Smart models FPGA-Express

Altera MAX+PLUS II

Model Technology

Tanner

ViewLogic

Ansys

TMA

• Suprem3
• Tsuprem4
• Medici

Silvaco

• Suprem3
• Athena
• Atlas

ISE-TCAD

• TESIM, DIOS-ISE
• DESSIS-ISE, DEGAS-ISE
• SOLIDIS-ISE