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AVAILABLE
TECHNOLOGIES
| TECHNOLOGY | TYPE | CHARACTERISTICS | APPLICATION |
| CNM
- 25* | CMOS
- 2.5 µm | 2
Poly - 2 Metal | Analog
/ Digital | | CNM
- POWER | DMOS/IGBT
Lateral and Vertical SiC devices | Double
diffused
Trench structures
Low, medium and high voltage (30V-2kV) | Power
Devices
Power MOSFET, IGBT, MOS-thyristor, power diodes, SiC-based devices |
| CNM
- µSYSTEMS | Bulk
/ Surface Si µmachining Anodic Bonding | KOH,
TMAH etchantsSi-doped and BESOI substrates
Low stress poly and dielectric
layers | Physical
and Chemical sensors, actuators and microsystems | |
Standard
material: 100 mm diameter Silicon substrates
*CNM25
is a 2.5 µm CMOS mixed analog/digital process with two metal layers and
two polysilicon layers to form poly/poly capacitors. A
Cadence Design Tool kit is available for CNM25 and CNMBiCMOS25 (an expansion
of CMOS25 with bipolar output stages). The design kit covers from HDL level entry
to physical design (Verilog and VHDL synthesis, schematic entry, Verilog digital
simulation, DRC, LVS, extraction and SPICE simulation, P&R...) and includes
standard cell library and an I/O library.
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